How to Use the PLL Calculator (MC 145151-2) for Stable Locking

MC 145151-2 PLL Calculator: Design, Parameters & Examples

Overview

The MC145151-2 is a phase-locked loop (PLL) frequency synthesizer IC commonly used for stable frequency generation and channel synthesis. A PLL calculator for the MC145151-2 helps designers choose loop-divider values, loop filter components, and VCO settings to meet lock range, capture/lock time, stability, and phase-noise requirements.

Key Parameters to Define

• Reference frequency (fref): frequency input to the phase detector.
• Output frequency (fout): target VCO/PLL output frequency.
• N-divider (N): integer ratio fout / fref (for integer-N synthesis).
• Phase detector frequency (fpd): usually fref or fref/2 depending on architecture.
• Charge pump current (Icp): determines loop gain; set by IC or external resistor.
• VCO gain (Kvco): Hz/V of VCO — from VCO datasheet or measurement.
• Loop filter type: typically passive passive 2nd-order (PI) or 3rd-order for noise shaping.
• Loop bandwidth (ωn or B_L): target closed-loop bandwidth (Hz).
• Damping factor (ζ): typically 0.5–0.8 for trade-off between settling and overshoot.
• Reference spurs & phase noise targets: drive choice of fref and loop bandwidth.

Design Procedure (step-by-step)

1. Choose fref:
   • Pick fref to give an integer N: N = fout / fref.
   • Higher fref reduces reference spurs and phase noise but may require faster PD/VCO.
2. Determine phase detector frequency (fpd):
   • Usually fpd = fref. Use the chosen fpd in loop equations.
3. Collect IC/VCO specifics:
   • Icp (A), Kvco (Hz/V), and any internal PD characteristics from MC145151-2 datasheet and selected VCO.
4. Select target loop bandwidth (B_L) and damping ζ:
   • Typical B_L = fpd/10 to fpd/100 depending on noise/spur trade-offs.
   • ζ = 0.6 (reasonable default).
5. Compute natural frequency ωn:
   • For a standard second-order model, B_L ≈ ωn(ζ + 1/(4ζ)). Solve for ωn.
6. Compute loop filter component values (passive PI example):
   • For a passive loop filter with series R1–C1 then parallel R2–C2 (standard charge-pump PI):
     • Transfer from charge pump current to control voltage uses R and C sizing so that:
       • K = Icp * Kvco / N
       • Use standard formulas to set C1, R1, C2 such that ωn and ζ match targets:
         • ωn = sqrt(K / (C1 * R1))
         • ζ = (⁄₂) * sqrt(K * R1 * C1) * (1/C2) … (use canonical design equations)
   • If uncertain, use recommended reference designs or iterative simulation.
7. Validate:
   • Check phase margin, loop gain crossover, and stability in a SPICE or PLL simulation.
   • Verify lock time and capture range meet system needs.
   • Evaluate phase noise and reference spur performance; adjust B_L and fref as needed.

Worked Example (integer-N, illustrative)

Assumptions:

• fout = 433.92 MHz
• Choose fref = 100 kHz → N = 433920000 / 100000 = 4339.2 → not integer — adjust fref.
• Choose fref = 10 kHz → N = 43392 (integer) — but low fref increases spurs.
• Better choice: fref = 125 kHz → N = 3471.36 (not integer). For simplicity pick fref = 8 kHz → N = 54240. (Reasonable designs pick fref that yields integer N; this example shows need to select fref carefully.)

Using a practical example instead:

• fout = 100 MHz, fref = 100 kHz → N = 1000.
• Icp = 50 µA (example), Kvco = 50 MHz/V